In brief: Alibaba unveiled its Zhenwu V900 AI accelerator at the Apsara Conference for commercial release in the first quarter of 2027. The May roadmap placed the same milestone in the third quarter. All technical figures are vendor claims; independent benchmarks are absent.
More memory and a 500,000-chip cluster target
T-Head's V900 carries 216 GB of memory, natively supports FP8 and FP4, and provides 1,200 GB/s chip-to-chip links, according to Alibaba. The company rates it at three times the M890 introduced in May. IT Home reports 144 GB and 800 GB/s for the M890, but Alibaba disclosed no test method or training and inference results behind the threefold claim.
The Panjiu supernode combines V900s with Alibaba's ICN switch, Panmai network adapter and Zhenyue SSD controller. CEO Eddie Wu says clusters can scale to 500,000 accelerators. That is a stated limit, not an operating deployment. Process node, power envelope, manufacturing partner and yield remain undisclosed.
Alibaba is training Qwen 4 and plans five-to-ten-trillion-parameter Qwen 4.5 and Qwen 5 models. It targets more than 20 GW of global data-centre capacity by 2032. Parameter count and electrical capacity indicate scale, not model quality or compute available in practice.
Pandorex Analysis: the date is the most concrete change
The clearest change is the schedule, not the uncalibrated 3× claim. Reuters documented Alibaba's third-quarter 2027 target on 20 May; mass production and release are now due in the first quarter. That would advance the public roadmap by about six months.
The disclosed data cannot support comparisons with NVIDIA, AMD or Huawei systems. Those require throughput and energy measurements on identical models, precision formats, batch and cluster sizes, plus usable interconnect bandwidth. Until then, the announcement mainly shows Alibaba's faster product cycle and integrated chip, network, storage, cloud and model stack.
