In brief: Huawei plans to complete Ascend 960DT in the first quarter of 2027, three quarters ahead of its previous schedule. Its new Peerium architecture is intended to connect as many as one million processors over time. The roadmap is ambitious, but Huawei's own capacity shortage and the absence of independent efficiency data limit what the headline scale proves.
An accelerated chip roadmap
At Huawei Connect in Shanghai, the company scheduled Ascend 960DT for the first quarter of 2027 and 960PR for the third quarter, bringing both forward. Ascend 970 and 980 are meant to follow in 2028 and 2029. Huawei also said it cannot manufacture enough AI computing equipment to meet Chinese demand, so it does not plan a broad international expansion.
An Ascend 960 supernode is designed to connect up to 4,096 AI processors. Multiple nodes would form clusters containing hundreds of thousands of processors, while Peerium targets a maximum configuration of one million. UnifiedBus links processors, memory, storage and networking inside the system. This extends the Atlas supercluster roadmap announced in 2025, when Huawei already proposed configurations exceeding one million Ascend NPUs.
Huawei frames the system strategy around communication overhead, claiming that inter-machine traffic can consume more than 40 per cent of training time in conventional server clusters. That figure is also a vendor claim. Public specifications for power consumption, availability, fault tolerance and usable bandwidth at the new Peerium scales are not yet available.
Pandorex Analysis
The accelerated 960 schedule and expanded interconnect fit Huawei's known manufacturing constraints: tightly coupled systems can offset part of the disadvantage when individual accelerators trail leading Western chips. That does not establish performance leadership. Energy demand, network complexity and failure probability all rise with cluster size; one million addressable processors do not automatically become one million efficiently usable processors.
Software remains another constraint. Huawei reports more than 5,200 monthly active Ascend developers and over 40 models trained directly on the platform, while Nvidia's CUDA has a far broader installed base. The strongest new finding is therefore not the maximum figure, but the combination of accelerated silicon, deeper system integration and an openly acknowledged supply shortage.